1. Field of the Invention
The present invention relates to a semiconductor device having a depletion type MOS transistor with a buried channel.
2. Description of the Related Art
One of transistor classifications divides MOS transistors into a normally-off type in which no current flows between the drain and the source when the gate voltage is 0 and a normally-on type in which a current flows between the drain and the source when the gate voltage is 0. The former is referred to as an enhancement type MOS transistor whereas the latter is referred to as a depletion type MOS transistor. For example, a depletion type N-channel MOS transistor is designed to have a threshold voltage of a negative value.
FIG. 2 is a schematic sectional view of a common depletion type N-channel MOS transistor. All N-channel MOS transistors, without regard to depletion type or enhancement type, are formed on a P-type well region 5 having a concentration of approximately 1×1015/cm3 to 1×1017/cm3. A difference between the depletion type and the enhancement type MOS transistor is that, in the depletion type MOS transistor, a low concentration N-type impurity region 3 having a concentration of 1×1017/cm3 to 5×1018/cm3 is formed in a channel region 9, which is below a gate oxide film 10, and constitutes an N-type current path together with N-type source/drain regions 2, which are on both sides of an N-type gate electrode 8 having a concentration of 1×1019/cm3 or higher. With this structure, applying a voltage between the drain/source regions causes a current to flow through the current path constituted of a group of N-type impurity regions even when the voltage applied to the gate electrode is 0 V.
The electrical operation of the common depletion type N-channel MOS transistor is described next. As described above, when the gate voltage is 0 V, a current flows between the N-type source/drain regions via the low concentration N-type impurity region according to a drain-source voltage. The top of this current path is an interface with the gate oxide film and the bottom of this current path is an interface within a PN junction between the P-type well region and the low concentration N-type impurity region. More strictly, the bottom of the current path corresponds to the top of a depletion layer formed in the vicinity of the PN junction between the P-type well region and the low concentration N-type impurity region. When the positive gate voltage is applied, more electrons are induced in the low concentration N-type impurity region, causing a larger current to flow.
When the negative gate voltage is applied, on the other hand, depletion starts downward, from the gate oxide film interface of the low concentration N-type impurity region, narrowing the current path in the PN junction between the low concentration N-type impurity region and the P-type well region according to the voltage increase in negative side, which lowers the current value accordingly.
Further increase in the gate voltage to the negative side brings the depletion layer, which is generated from the gate oxide film interface with the low concentration N-type impurity region, into contact with another depletion layer, which is formed by the PN junction between the low concentration N-type impurity region and the P-type well region, and the current path is lost and the current value reaches 0. Generally, the gate voltage value at this point is regarded as a threshold voltage of the depletion type N-channel MOS transistor, and takes a negative value.
As can be understood from the above, the current flow path is constituted mainly of a deep part that is closer to the semiconductor substrate side than the gate oxide film, and this is why depletion type MOS transistors are also called as buried channel MOS transistors. Enhancement type MOS transistors, on the other hand, are commonly surface channel transistors.
In order to produce a depletion type N-channel MOS transistor whose electrical operation and structure are as described above by a semiconductor manufacture process, a channel forming step of implanting N-type impurities below the gate oxide film is added prior to the forming of the gate oxide film, or at a point before the forming of the gate electrode and after the forming of the gate oxide film. The N-type impurities to be implanted are phosphorus or arsenic, and introduced by ion implantation at a dose between 1×1011/cm2 and 1×1013/cm2.
Depletion type MOS transistors produced in this manner are used in many cases as a constant current source in a semiconductor integrated circuit to take advantage of their characteristics as the normally-on type. In another application example, a depletion type MOS transistor constitutes a constant voltage circuit by making use of its constant current. Those uses are found particularly often in analog circuits, and a depletion type MOS transistor that has a more precise constant current property can contribute more to the enhancement of analog circuit performance and the lowering of the overall cost of an analog circuit.
Specifically, a depletion type MOS transistor in an analog circuit is required to be precise in threshold voltage and in current driving ability. However, the threshold voltage of depletion type N-channel MOS transistors generally fluctuates more than the threshold voltage of enhancement type N-channel MOS transistors.
The reason is that, whereas the following three parameters generally determine the threshold voltage of enhancement type N-channel MOS transistors, depletion type N-channel MOS transistors additionally have the depth of a channel impurity region as one of parameters relevant to the threshold voltage.
1) Channel impurity concentration
2) Gate oxide film thickness
3) Flat band voltage determined by fixed charge and other factors
A method involving producing a depletion type MOS transistor and a method involving reducing the transistor's degradation and fluctuation in characteristics are disclosed in, for example, JP 07-161978 A.
Still, conventional depletion type MOS transistors have the following problem. The extension of the depletion layer in the channel is involved in the magnitude of the threshold voltage of a depletion type MOS transistor as described above. A voltage required to cause the extension of the depletion layer is in proportion to the square of the extension of the depletion layer, and hence a fluctuation in depletion layer distance changes the threshold voltage significantly. The depletion layer distance corresponds to the depth of the N-type impurity region in the case of N-channel MOS transistors, and varies depending on the unevenness of heat treatment performed after the N-type impurity implantation and on a concentration fluctuation in a deep part of the P-type well layer, which are difficult to reduce. The threshold voltage of depletion type MOS transistors therefore fluctuates much more than the threshold voltage of enhancement type MOS transistors. The fluctuation may be absorbed in an analog circuit by employing a design or specifications that have a large margin, but this gives rise to a problem by making it difficult to provide a high precision analog IC at a low cost.